<pre style='margin:0'>
Herby Gillot (herbygillot) pushed a commit to branch master
in repository macports-ports.

</pre>
<p><a href="https://github.com/macports/macports-ports/commit/418b20c1ea783a4401b7c0e910316f147bb215b2">https://github.com/macports/macports-ports/commit/418b20c1ea783a4401b7c0e910316f147bb215b2</a></p>
<pre style="white-space: pre; background: #F8F8F8">The following commit(s) were added to refs/heads/master by this push:
<span style='display:block; white-space:pre;color:#404040;'>     new 418b20c1ea7 postgresql17: rebase patch so that it applies successfully
</span>418b20c1ea7 is described below

<span style='display:block; white-space:pre;color:#808000;'>commit 418b20c1ea783a4401b7c0e910316f147bb215b2
</span>Author: Sergey Fedorov <barracuda@macos-powerpc.org>
AuthorDate: Tue Nov 19 17:33:34 2024 +0800

<span style='display:block; white-space:pre;color:#404040;'>    postgresql17: rebase patch so that it applies successfully
</span>---
 .../postgresql17/files/patch-fix-ppc-asm.diff      | 23 +++++++++++-----------
 1 file changed, 11 insertions(+), 12 deletions(-)

<span style='display:block; white-space:pre;color:#808080;'>diff --git a/databases/postgresql17/files/patch-fix-ppc-asm.diff b/databases/postgresql17/files/patch-fix-ppc-asm.diff
</span><span style='display:block; white-space:pre;color:#808080;'>index 220c8aabfe5..b4f3b329741 100644
</span><span style='display:block; white-space:pre;background:#e0e0ff;'>--- a/databases/postgresql17/files/patch-fix-ppc-asm.diff
</span><span style='display:block; white-space:pre;background:#e0e0ff;'>+++ b/databases/postgresql17/files/patch-fix-ppc-asm.diff
</span><span style='display:block; white-space:pre;background:#e0e0e0;'>@@ -255,17 +255,17 @@ diff --git src/include/storage/s_lock.h src/include/storage/s_lock.h
</span> index cc83d561b2..0877cf65b0 100644
 --- src/include/storage/s_lock.h
 +++ src/include/storage/s_lock.h
<span style='display:block; white-space:pre;background:#ffe0e0;'>-@@ -435,8 +435,7 @@ typedef unsigned int slock_t;
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+@@ -412,8 +412,7 @@
</span>   *
   * NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
   * an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
 - * But if the spinlock is in ordinary memory, we can use lwsync instead for
 - * better performance.
 + * On newer machines, we can use lwsync instead for better performance.
<span style='display:block; white-space:pre;background:#ffe0e0;'>-  *
</span><span style='display:block; white-space:pre;background:#ffe0e0;'>-  * Ordinarily, we'd code the branches here using GNU-style local symbols, that
</span><span style='display:block; white-space:pre;background:#ffe0e0;'>-  * is "1f" referencing "1:" and so on.  But some people run gcc on AIX with
</span><span style='display:block; white-space:pre;background:#ffe0e0;'>-@@ -451,15 +450,23 @@ tas(volatile slock_t *lock)
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+  */
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ static __inline__ int
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ tas(volatile slock_t *lock)
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+@@ -422,7 +421,11 @@
</span>   int _res;
  
        __asm__ __volatile__(
<span style='display:block; white-space:pre;background:#e0e0e0;'>@@ -275,22 +275,21 @@ index cc83d561b2..0877cf65b0 100644
</span> +"   lwarx   %0,0,%3         \n"
 +#endif
  "        cmpwi   %0,0            \n"
<span style='display:block; white-space:pre;background:#ffe0e0;'>- " bne     $+16            \n"                /* branch to li %1,1 */
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ "    bne     1f                      \n"
</span>  "   addi    %0,%0,1         \n"
<span style='display:block; white-space:pre;background:#ffe0e0;'>- " stwcx.  %0,0,%3         \n"
</span><span style='display:block; white-space:pre;background:#ffe0e0;'>--"    beq     $+12            \n"                /* branch to lwsync */
</span><span style='display:block; white-space:pre;background:#ffe0e0;'>-+"    beq     $+12            \n"                /* branch to lwsync/isync */
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+@@ -432,7 +435,11 @@
</span>  "   li      %1,1            \n"
<span style='display:block; white-space:pre;background:#ffe0e0;'>- " b       $+12            \n"                /* branch to end of asm sequence */
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ "    b       3f                      \n"
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ "2: \n"
</span> +#ifdef USE_PPC_LWSYNC
  "        lwsync                          \n"
 +#else
 +"        isync                           \n"
 +#endif
  "        li      %1,0            \n"
<span style='display:block; white-space:pre;background:#ffe0e0;'>- 
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+ "3: \n"
</span>  :        "=&b"(_t), "=r"(_res), "+m"(*lock)
<span style='display:block; white-space:pre;background:#ffe0e0;'>-@@ -470,14 +477,23 @@ tas(volatile slock_t *lock)
</span><span style='display:block; white-space:pre;background:#e0ffe0;'>+@@ -443,14 +450,23 @@
</span>  
  /*
   * PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
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