<div dir="ltr"><div dir="ltr"><div>In addition to SIMDe, projects like Blender are using sse2neon to allow them to compile Blender on arm64 while using libraries that use Intel intrinsics and haven't been ported for use with Arm Neon.</div><div><br></div><div><a href="https://github.com/DLTcollab/sse2neon">https://github.com/DLTcollab/sse2neon</a></div><div><br></div><div>I plan to package sse2neon after I update a couple of the other ports I'm maintaining. Maybe I'll try packaging SIMDe at the same time. However, since I don't own an M1 Mac, I'm hoping that people on this mailing list would be able to help test my portfile before I submit them. Any volunteers? :)<br></div><div><br></div><div><div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature"><div dir="ltr"><div>-- </div><div>Jason Liu<br></div></div></div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Apr 26, 2021 at 3:16 PM Georges Martin <<a href="mailto:jrjsmrtn@gmail.com">jrjsmrtn@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div style="overflow-wrap: break-word;">And this article describes SIMDe:<div><br></div><div><span style="white-space:pre-wrap"> </span><a href="https://simd-everywhere.github.io/blog/2020/06/22/transitioning-to-arm-with-simde.html" target="_blank">https://simd-everywhere.github.io/blog/2020/06/22/transitioning-to-arm-with-simde.html</a><br><div><br></div></div><blockquote style="margin:0px 0px 0px 40px;border:medium none;padding:0px"><div><div><span style="color:rgb(17,17,17);background-color:rgb(253,253,253)">SIMD Everywhere (SIMDe) provides fast, portable, permissively-licensed (MIT) implementations of the x86 APIs which allow you to run code designed for x86/x86_64 CPUs pretty much anywhere, including on Arm (using NEON if available). With almost no source code changes, you can recompile your x86 SIMD code for Arm (or POWER, or WebAssembly, etc.).</span></div></div></blockquote><div><div><br></div><div>...that is not yet packaged for MacPorts ;-) ;-) ;-)</div><div><br></div><div>G.</div><div><br><blockquote type="cite"><div>Le 26 avr. 2021 à 20:56, Georges Martin <<a href="mailto:jrjsmrtn@gmail.com" target="_blank">jrjsmrtn@gmail.com</a>> a écrit :</div><br><div><div style="overflow-wrap: break-word;"><blockquote type="cite"><div dir="ltr"><div>Aha, hw.optional! That's useful, thanks Georges!</div></div></blockquote><div><br></div>You're welcome :-) You also have:<div><br></div><div><div><span style="white-space:pre-wrap"> </span>hw.optional.amx_version: 2</div><div><span style="white-space:pre-wrap"> </span>hw.optional.arm64: 1</div><div><div><span style="white-space:pre-wrap"> </span>hw.targettype: J313</div></div><div><br></div><div>"amx" is the Neural Engine and I think "J313" is the code name for the M1.</div><div><br></div><div>You may find this article very interesting:</div><div><br></div><div><span style="white-space:pre-wrap"> </span><a href="https://levelup.gitconnected.com/armv9-what-is-the-big-deal-4528f20f78f3" target="_blank">https://levelup.gitconnected.com/armv9-what-is-the-big-deal-4528f20f78f3</a></div><div><br></div><div>It describes the new ARMv9 instruction set with SVE2 and how it compares to Intel/AMD MMX/SSE/AVX and NEON/SVE.</div><div><br></div><div>Question is: would Apple adopt ARMv9 with SVE2 in a M2 for a future Mac Pro ? ;-)</div><div><br></div><div>G.</div><div><br><blockquote type="cite"><div>Le 26 avr. 2021 à 20:44, Jason Liu <<a href="mailto:jasonliu@umich.edu" target="_blank">jasonliu@umich.edu</a>> a écrit :</div><br><div><div dir="ltr"><div>Aha, hw.optional! That's useful, thanks Georges!</div><div><br></div><div><div><div dir="ltr"><div dir="ltr"><div>-- </div><div>Jason Liu<br></div></div></div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Apr 26, 2021 at 2:16 PM Georges Martin <<a href="mailto:jrjsmrtn@gmail.com" target="_blank">jrjsmrtn@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div><div>$ sysctl hw.optional | grep -E 'neon|armv8'</div><div>hw.optional.neon: 1</div><div>hw.optional.neon_hpfp: 1</div><div>hw.optional.neon_fp16: 1</div><div>hw.optional.armv8_1_atomics: 1</div><div>hw.optional.armv8_crc32: 1</div><div>hw.optional.armv8_2_fhm: 1</div><div>hw.optional.armv8_2_sha512: 1</div><div>hw.optional.armv8_2_sha3: 1</div><div><br><blockquote type="cite"><div>Le 26 avr. 2021 à 19:55, Jason Liu <<a href="mailto:jasonliu@umich.edu" target="_blank">jasonliu@umich.edu</a>> a écrit :</div><br><div><div dir="ltr"><div dir="ltr"><div><div dir="ltr" class="gmail_attr">On Mon, Apr 26, 2021 at 1:42 PM Christopher Jones <<a href="mailto:jonesc@hep.phy.cam.ac.uk" target="_blank">jonesc@hep.phy.cam.ac.uk</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div>Thats not at all surprising as those instruction sets are very much specific to X86_64 systems.<div><br></div><div>RISC processors, Arm, do have their own sets of SIMD instructions (e.g. Neon), but they are entirely different to those on X86_64 machines. </div><div><br></div><div>Whether or these are supported on Apple’s M1 processors I have no idea.</div></div></blockquote></div><div><br></div><div>It looks like the M1 supports Neon SIMD instructions, but not SVE SIMD (which I guess is supposed to be similar to AVX?):</div><div><br></div><div><a href="https://discussions.apple.com/thread/252073619" target="_blank">https://discussions.apple.com/thread/252073619</a></div><div><br></div><div><div><div dir="ltr"><div dir="ltr"><div>-- </div><div>Jason Liu<br></div></div></div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Apr 26, 2021 at 1:42 PM Christopher Jones <<a href="mailto:jonesc@hep.phy.cam.ac.uk" target="_blank">jonesc@hep.phy.cam.ac.uk</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div><br><div><br><blockquote type="cite"><div>On 26 Apr 2021, at 6:28 pm, Jason Liu <<a href="mailto:jasonliu@umich.edu" target="_blank">jasonliu@umich.edu</a>> wrote:</div><br><div><div dir="ltr"><div>Thanks Arno :)</div><div><br></div><div>I'm kind of surprised that the M1 doesn't seem to support any SSE or AVX....</div></div></div></blockquote><div><br></div><div><br></div>Thats not at all surprising as those instruction sets are very much specific to X86_64 systems.</div><div><br></div><div>RISC processors, Arm, do have their own sets of SIMD instructions (e.g. Neon), but they are entirely different to those on X86_64 machines. </div><div><br></div><div>Whether or these are supported on Apple’s M1 processors I have no idea.</div><div><br></div><div>Chris</div><div><br></div><div><br></div><div><br><blockquote type="cite"><div><div dir="ltr"><div><br></div><div>Does "sysctl machdep.cpu.features" return anything?<br></div><div><br></div><div><div><div dir="ltr"><div dir="ltr"><div>-- </div><div>Jason Liu<br></div></div></div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Apr 26, 2021 at 1:23 PM Arno Hautala <<a href="mailto:arno@alum.wpi.edu" target="_blank">arno@alum.wpi.edu</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">> On 26 Apr 2021, at 13:20, Jason Liu <<a href="mailto:jasonliu@umich.edu" target="_blank">jasonliu@umich.edu</a>> wrote:<br>
> <br>
> sysctl machdep.cpu.brand_string ; sysctl machdep.cpu | grep -i "avx\|sse”<br>
<br>
$ sysctl machdep.cpu.brand_string ; sysctl machdep.cpu | grep -i "avx\|sse”<br>
machdep.cpu.brand_string: Apple M1<br>
<br>
-- <br>
arno s hautala /-| <a href="mailto:arno@alum.wpi.edu" target="_blank">arno@alum.wpi.edu</a><br>
<br>
pgp b2c9d448<br>
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